Semiconductor light-emitting device and method for manufacturing the same

ABSTRACT

The disclosed invention relates to a semiconductor light-emitting element comprising: a plurality of semiconductor layers which are provided with a growth substrate eliminating surface on the side where a first semiconductor layer is located; a support substrate which is provided with a first electrical pathway and a second electrical pathway; a joining layer which joins a first surface side of the support substrate with a second semiconductor layer side of the plurality of semiconductor layers, and is electrically linked with the first electrical pathway; a joining layer eliminating surface which is formed on the first surface, and in which the second electrical pathway is exposed, and which is open towards the plurality of semiconductor layers; and an electrical link for electrically linking the plurality of semiconductor layers with the second electrical pathway exposed in the joining layer eliminating surface.

TECHNICAL FIELD

The present disclosure relates generally to a semiconductor lightemitting device or element and a method for manufacturing the same. Morespecifically, the present disclosure related to a semiconductor lightemitting device having electrical passes on a supporting substrate, anda method for manufacturing the same.

Within the context herein, the term “semiconductor light emittingdevice” is intended to refer to a semiconductor light emitting devicethat generates light via electron-hole recombination, and the typicalexample thereof is a group III-nitride semiconductor light emittingdevice. The group III-nitride semiconductor is composed ofAl_((x))Ga_((y))In_((1-x-y))N (wherein, 0≦x≦1, 0≦y≦1, 0≦x+y≦1). Anotherexample thereof is a GaAs-based semiconductor light emitting device usedfor red light emission.

BACKGROUND

This section provides background information related to the presentdisclosure which is not necessarily prior art.

FIG. 1 is a view illustrating one example of the semiconductor lightemitting device (Lateral Chip) in the prior art, in which thesemiconductor light emitting device includes a substrate 100, and abuffer layer 200, a first semiconductor layer 300 having a firstconductivity, an active layer 400 for generating light via electron-holerecombination and a second semiconductor layer 500 having a secondconductivity different from the first conductivity, which are depositedover the substrate 100 in the order mentioned, and additionally, alight-transmitting conductive film 600 for current spreading, and anelectrode 700 serving as a bonding pad are formed thereon, and anelectrode 800 serving as a bonding pad are formed on an etch-exposedportion of the first semiconductor layer 300.

FIG. 2 is a view illustrating another example of the semiconductor lightemitting device (Flip Chip) in the prior art, in which the semiconductorlight emitting device includes a substrate 100, and a firstsemiconductor layer 300 having a first conductivity, an active layer 400for generating light via electron-hole recombination and a secondsemiconductor layer 500 having a second conductivity different from thefirst conductivity, which are deposited over the substrate 100 in theorder mentioned, and additionally, three-layered electrode films forreflecting light towards the substrate 100, i.e., an electrode film 901,an electrode film 902 and an electrode film 903 are formed thereon, andan electrode 800 serving as a bonding pad is formed on an etch-exposedportion of the first semiconductor layer 300.

FIG. 3 is a view illustrating yet another example of the semiconductorlight emitting device (Vertical Chip) in the prior art, in which thesemiconductor light emitting device includes a first semiconductor layer300 having a first conductivity, an active layer 400 for generatinglight via electron-hole recombination and a second semiconductor layer500 having a second conductivity different from the first conductivity,which are deposited in the order mentioned, and additionally, a metalreflective film 910 for reflecting light towards the first semiconductorlayer 300 is formed on the second semiconductor layer 500, and anelectrode 940 is formed on the side of a supporting substrate 930. Themetal reflective film 910 and the supporting substrate 930 are joinedtogether by a wafer bonding layer 920. An electrode 800 serving as abonding pad is formed on the first semiconductor layer 300.

FIG. 4 and FIG. 5 illustrate yet further examples of the semiconductorlight emitting device in the prior art. As illustrated in FIG. 4, asemiconductor light emitting device (Flip Chip) as shown in FIG. 2 ismounted on a wiring board (1000), and then a substrate 100 is removed asshown in FIG. 5, thereby obtaining a semiconductor light emitting device(Vertical Chip; it is termed such to indicate the substrate 100 has beenremoved). In particular, this semiconductor light emitting device can beobtained by aligning electrode films 901, 902 and 903 and an electrodepattern 1010, followed by aligning an electrode 800 and an electrodepattern 1020. A semiconductor light emitting device is then mounted onthe wiring board 1000, using a stud bump, paste or eutectic metals 950and 960, and the substrate 100 is removed by means of a laser.

However, because the above process needs to be performed at the chiplevel, the process gets lengthy and complicated, and the alignment ofthe electrode films 901, 902 and 903, the electrode 800, and theelectrode patterns 1010 and 1020 also creates difficulties. Apart fromthat, an increase in costs associated with the phosphor coating at thechip level adds another problem.

Therefore, while the commercialization of TFFC (Thin Film Flip Chip)technology at the chip level represents a high level manufacturingtechnology of semiconductor light emitting devices, on the other hand,it also openly manifests that the application of such technology at thewafer level is not yet made easy. Many suggestions have been made inorder to apply this concept at the wafer level. Nevertheless, neither asemiconductor light emitting device nor a method for manufacturing thesame was proposed, which can substantially overcome the difficulties inthe alignment of electrode films 901, 902 and 903, the electrode 800 andthe electrode patterns 1010 and 1020 and, after a wafer level bondingoperation, the cracks in the semiconductor layers 200, 300 and 400during the removal of the substrate 100 and in the subsequent processes.

TECHNICAL PROBLEM

The problems to be solved by the present disclosure will be described inthe latter part of the best mode for carrying out the invention.

SUMMARY

This section provides a general summary of the disclosure and is not acomprehensive disclosure of its full scope or all of its features.

According to one aspect of the present disclosure, there is provided asemiconductor light emitting device, which comprises a plurality ofsemiconductor layers that grows sequentially on a growth substrate, withthe plurality of semiconductor layers including a first semiconductorlayer having a first conductivity and a growth substrate-removed surfacebeing formed on the side thereof, a second semiconductor layer having asecond conductivity different from the first conductivity, and an activelayer interposed between the first semiconductor layer and the secondsemiconductor layer, generating light via electron-hole recombination; asupporting substrate having a first surface and a second surfaceopposite to the first surface, wherein a first electrical pass via whicheither electrons or holes are transferred to the plurality ofsemiconductor layers, and a second electrical pass via which eitherelectrons or holes whichever have not been transferred via the firstelectrical pass are transferred to the plurality of semiconductor layerscontinue from the second surface to the first surface; a bonded layer,which bonds the second semiconductor layer side of the plurality ofsemiconductor layers to the first surface side of the supportingsubstrate and is electrically connected with the first electrical pass;a bonded layer-removed surface formed on the first surface, exposing thesecond electrical pass and being open towards the plurality ofsemiconductor layer; and an electrical connection for electricallyconnecting the plurality of semiconductor layers with the secondelectrical pass exposed on the bonded layer-removed surface such thateither electrons or holes whichever have not been transferred via thefirst electrical pass are transferred to the plurality of semiconductorlayers.

According to another aspect of the present disclosure, there is provideda method for manufacturing a semiconductor light emitting device,comprising the steps of: preparing a plurality of semiconductor layersthat grows sequentially on a growth substrate, with the plurality ofsemiconductor layers including a first semiconductor layer having afirst conductivity and a growth substrate-removed surface being formedon the side thereof, a second semiconductor layer having a secondconductivity different from the first conductivity, and an active layerinterposed between the first semiconductor layer and the secondsemiconductor layer, generating light via electron-hole recombination;preparing a supporting substrate having a first surface and a secondsurface opposite to the first surface, wherein a first electrical passvia which either electrons or holes are transferred to the plurality ofsemiconductor layers, and a second electrical pass via which eitherelectrons or holes whichever have not been transferred via the firstelectrical pass are transferred to the plurality of semiconductor layersare provided; bonding the plurality of semiconductor layers side on theopposite side of the growth substrate with the first surface side of thesupporting substrate, such that a bonded layer is formed on the bondedregion and the first electrical pass is electrically connected to theplurality of semiconductor layers via the bonded layer; removing thesubstrate; removing the bonded layer so as to expose the secondelectrical pass; and electrically connecting the second electrical passwith the plurality of semiconductor layer such that either electrons orholes whichever have not been transferred via the first electrical passare transferred to the plurality of semiconductor layers.

Advantageous Effects

The advantageous effects of the present disclosure will be described inthe latter part of the best mode for carrying out the invention.

DRAWINGS

FIG. 1 is a view illustrating one example of a semiconductor lightemitting device (Lateral Chip) in the prior art.

FIG. 2 is a view illustrating another example of a semiconductor lightemitting device (Flip Chip) in the prior art.

FIG. 3 is a view illustrating yet another example of a semiconductorlight emitting device (Vertical Chip) in the prior art.

FIG. 4 and FIG. 5 are views illustrating yet further examples of asemiconductor light emitting device in the prior art.

FIG. 6 is a view describing the technical concept of a semiconductorlight emitting device according to the present disclosure.

FIG. 7 through FIG. 11 views illustrating one example of the method formanufacturing a semiconductor light emitting device according to thepresent disclosure.

FIG. 12 is a view illustrating one example of the process of forming anelectrical connection according to the present disclosure.

FIG. 13 is a view illustrating another example of the process of formingan electrical connection according to the present disclosure.

FIG. 14 is a view illustrating yet another example of the process offorming an electrical connection according to the present disclosure.

FIG. 15 is a view illustrating yet another example of the process offorming an electrical connection according to the present disclosure.

FIG. 16 is a view illustrating examples of the form of a growthsubstrate-removed surface in the semiconductor light emitting deviceshown in FIG. 12.

FIG. 17 is a view illustrating examples of the form of an electricalconnection according to the present disclosure.

FIG. 18 through FIG. 20 are views illustrating examples of theapplication of a phosphor in the present disclosure.

DETAILED DESCRIPTION

Hereinafter, the present disclosure will now be described in detail withreference to the accompanying drawings.

FIG. 6 is a view describing the technical concept of a semiconductorlight emitting device according to the present disclosure, in which thesemiconductor light emitting device has a plurality of semiconductorlayers which includes a first semiconductor layer 30 (e.g. n-type GaN)having a first conductivity, a second semiconductor layer 50 (e.g.p-type GaN) having a second conductivity different from the firstconductivity, and an active layer 40 (e.g. InGaN/GaN multi-quantum wellstructure) interposed between the first semiconductor layer 30 and thesecond semiconductor layer 50, generating light via electron-holerecombination. The conductivity of the first semiconductor layer 30 andthe conductivity of the second semiconductor layer 50 may be changed.The plurality of semiconductor layers 30, 40 and 50 has a growthsubstrate-removed surface 31 that is exposed by the removal of thegrowth substrate 10 (see FIG. 7). The growth substrate-removed surface31 can be comprised of a doped n layer, an undoped n layer or a bufferlayer 200 as in FIG. 1, depending on the conditions for the removal ofthe growth substrate and the sacrificial layer. It can also be a roughsurface in order to increase the light extraction efficiency. Further,the semiconductor light emitting device has a supporting substrate 101with a first surface 101 a and a second surface 101 b opposite to thefirst surface 101 a. The supporting substrate 101 has a first electricalpass 91 and a second electrical pass 92. In FIG. 6, the first electricalpass 91 and the second electrical pass 92 continue from the secondsurface 101 a to the first surface 101 b. The plurality of semiconductorlayers 30, 40 and 50 and the supporting substrate 101 are joined orbonded by a bonded layer 90. The bonded layer 90 can be formed by aconventional wafer bonding method that is employed in the manufacture ofthe semiconductor light emitting device as in FIG. 3. The firstelectrical pass 91 transfers either electrons or holes to the pluralityof semiconductor layers 30, 40 and 50, via the bonded layer 90. Byremoving the bonded layer 90, the second electrical pass 92 is exposedon the first surface 101 a. With the bonded layer 90 being removed, thesecond electrical pass 92 is open towards the plurality of thesemiconductor layers 30, 40 and 50. This open, exposed area of the firstsurface 101 a is defined as a bonded layer-removed surface 102. anelectrical connection 93 can electrically connect the second electricalpass 92 to the first semiconductor layer 30 or to the secondsemiconductor layer 50.

FIG. 7 through FIG. 11 views illustrating one example of the method formanufacturing a semiconductor light emitting device according to thepresent disclosure. Referring now to FIG. 7, a first semiconductor layer30, an active layer 40 and a second semiconductor layer 40 that aresequentially grown on a growth substrate 10 (e.g. a sapphire substrate)are first bonded, via a bonded layer 90 having been formed, to asupporting substrate 101 where a first electrical pass 91 and a secondelectrical pass 92 are provided. Exemplary materials of the growthsubstrate 10 may include Si, AlN, AlGaN, SiC and so on, but are notlimited thereto. As for the supporting substrate 101, any material thatprevents the plurality of semiconductor layers 30, 40 and 50 fromcracking during the removal of the growth substrate and thatdemonstrates superior heat dissipation performances is suitable, andexamples thereof may include SiC, AlSiC, AlN, AlGaN, GaN, sapphire, LTCC(Low Temperature Co-fired Ceramic), HTCC (High Temperature Co-firedCeramic) and so on. It is preferable to have a buffer layer 200 as inFIG. 1, during the growth of the plurality of semiconductor layers 30,40 and 50. Next, referring to FIG. 8, the growth substrate 10 isseparated and removed from the plurality of semiconductor layers 30, 40and 50. This removal of the growth substrate 10 can be achieved by laserlift-off, wet etching using a sacrificial layer, grinding, CMP(Chemical-Mechanical Polishing) or the like. Next, referring to FIG. 9,in a wafer level state (This wafer level should be understood as arelative concept to the chip level. Normally, the wafer level indicatesa state where the plurality of semiconductor layers 30, 40 and 50 isstacked on the growth substrate 10. However, one should understand thatit also includes a state of the plurality semiconductor layers 30, 40and 50 on the growth substrate 10 cut in a bulk larger than the chiplevel, prior to the chip level, i.e. before becoming a chip cut into ashape that is practically used.), before being divided into individualchips, the plurality of semiconductor layers 30, 40 and 50 is partlyremoved and isolated. After this, as shown in FIG. 10, a bonded layer 90is removed to form a bonded layer-removed surface 102, and the secondelectrical pass 92 is then exposed. The removal of the bonded layer 90can be achieved by a well-known dry etching or wet etching process. Itis not always required that the removal of the bonded layer 90 shouldfollow the isolation of the plurality of semiconductor layers 30, 40 and50 into individual chips. For instance, in order to form the bondedlayer 90, first, the plurality of semiconductor layers 30, 40 and 50 andthe bonded layer 90 may be removed such that a bonded layer-removedsurface 102 is formed, and thereafter the plurality of semiconductorlayers 30, 40 and 50 can be isolated for individual chips. Referringnext to FIG. 11, if necessary, an insulating layer 110 (e.g. SiO₂) isprovided, and an electrical connection 93 is formed. The electricalconnection 93 can be formed by depositing any metal(s) used in a widevariety of semiconductor processes. The bonded layer 90 may be formed byproviding a bonding material to the plurality of semiconductor layers30, 40 and 50 as well as to the supporting substrate 101, or byproviding a bonding material to either side. The supporting substrate101 is perforated and a conductive material is inserted therein, suchthat the first electrical pass 91 and the second electrical pass 92 areformed. This can be done by electroplating. The first electrical pass 91and the second electrical pass 92 may continue to the second surface 101b (see FIG. 6) from the first, or they may be exposed as the secondsurface 101 b is grinded.

FIG. 12 is a view illustrating one example of the process of forming anelectrical connection according to the present disclosure. Here, a firstelectrical connection 91 is electrically connected to a firstsemiconductor layer 30 via a bonded layer 90 such that electrons aretransferred to an active layer 40 via the first semiconductor layer 30.A second electrical connection 92 is electrically connected, through anelectrical connection 93, to a second semiconductor layer 40 via a firstconductive layer 94 such that holes are transferred to the active layer40 via the second semiconductor layer 50.

As the plurality of semiconductor layers 30, 40 and 50 is removed, thefirst conductive layer 94 is exposed and electrically connected with theelectrical connection 93. The first conductive layer 94 preferablyconsists of a material which not only spreads current into the secondsemiconductor layer 50 but also reflects light generated in the activelayer 40 towards the first semiconductor layer 30. The first conductivelayer 94 can be formed of Au, Pt, Ag, Al, Rh, Cr, Cu, Ta, Ni, Pd, Mg,Ru, Ir, Ti, V, Mo, W, TiW, CuW, ITO, ZnO, SnO₂, In₂O₃, or an alloythereof, in a multi-layer (e.g. at least two layer) configuration.

The electrical connection 93 can be formed of Au, Pt, Ag, Al, Rh, Cr,Cu, Ta, Ni, Pd, Mg, Ru, Ir, Ti, V, Mo, W, TiW, CuW or an alloy thereof,in a multi-layer (e.g. at least two layer) configuration.

The bonded layer 90 includes a conductive bonded layer 96 provided ontoa supporting substrate 101, and a second conductive layer 95 provided onthe side of the plurality of semiconductor layer 30, 40 and 50 andcontinuing to the first semiconductor layer 30 passing through thesecond semiconductor layer 50 and the active layer 30. The conductivebonded layer 95 may be comprised of a single material, or have anothersuitable material for bonding on the side abutting against theconductive bonded layer 96.

The conductive bonded layer 95 may be composed of any material(s)forming Ohmic contact with GaN materials and any material(s) serving asa bond, and can be formed of Au, Pt, Ag, Al, Rh, Cu, Ta, Ni, Pd, Ti, V,Mo, W, TiW, CuW, Sn, In, Bi, or an alloy thereof, in a multi-layer (e.g.at least two layer) configuration.

The conductive bonded layer 96 may be composed of any material(s) ofexcellent adhesion with the supporting substrate and any material(s)serving as a bond, and can be formed of Ti, Ni, W, Cu, Ta, V, TiW, CuW,Au, Pd, Sn, In, Bi, or an alloy thereof, in a multi-layer (e.g. at leasttwo layer) configuration.

Reference numeral 110 and 111 denote insulating layers.

With the above configuration, the entire surfaces of the plurality ofsemiconductor layers 30, 40 and 50 and the entire surface of thesupporting substrate 101 are used for bonding, and these entire surfacesremain in the bonded state even during the removal of the growthsubstrate 10 (see FIG. 7), such that the plurality of semiconductorlayer 30, 40 and 50 can be prevented from cracking. Moreover, thealignment between the first electrical pass 91 and the second electricalpass 92, and the plurality of semiconductor layers 30, 40 and 50 can becarried out without difficulties. Nevertheless, after the growthsubstrate 10 is removed, an electrical connection between the secondelectrical pass 92 and the plurality of semiconductor layers 30, 40 and50 is required. For this, the bonded layer 90 having already been bondedis removed to form a bonded layer-removed surface 102, and the secondelectrical pass 92 and the second semiconductor layer 50 areelectrically connected using the electrical connection 93. A personskilled in the art should consider that, apart from the presentdisclosure, it is also possible to form small holes in the secondconductive layer 95 or in the conductive bonded layer 96, prior to theformation of the bonded layer 90. Preferably, a rear electrode 120 and arear electrode 121 are provided onto the second surface 101 b of thesupporting substrate 101 and connected with the first electrical pass 91and the second electrical pass 92, such that they can serve as leadframes.

FIG. 13 is a view illustrating another example of the process of formingan electrical connection according to the present disclosure. Here, afirst conductive layer 94 and a conductive bonded layer 96 are bonded toform a bonded layer 90, and a second conductive layer 95 and anelectrical connection 93 are connected, whereby current is supplied fromthe second electrical pass 92 to a first semiconductor layer 30.

FIG. 14 is a view illustrating yet another example of the process offorming an electrical connection according to the present disclosure.Here, a conductive bonded layer 96 and a second conductive layer 94 arebonded to form a bonded layer 90. However, only the second conductivelayer 94 is involved with bonding, and no current is supplied to a firstsemiconductor layer 30. A first electric pass 91 is electricallyconnected with a second semiconductor layer 50, via the bonded layer 90and a first conductive layer 95. Here, the first conductive layer 95 canserve as a reflective film and/or current spreading layer. The currentsupply to the first semiconductor layer 30 can be achieved by anelectrical connection 93 continuing from a second electrical pass 92 toa growth substrate-removed surface 31.

FIG. 15 is a view illustrating yet another example of the process offorming an electrical connection according to the present disclosure.Here, prior to bonding, a second semiconductor layer 50 and an activelayer 40 are removed and thus a mesa surface 32 is formed on a firstsemiconductor layer 30 in the plurality of semiconductor layers 30, 40and 50. Once the mesa surface 32 is formed, an isolation process canalso be done on the plurality of semiconductor layers 30, 40 and 50 inadvance. With this configuration, after the formation of the mesasurface 32, the active layer 40 may have a protective layer (e.g. SiO₂;it becomes a part of an insulating layer 110), which in turn wouldenhance the reliability of the device in the subsequence processes.

FIG. 16 is a view illustrating examples of the form of a growthsubstrate-removed surface in the semiconductor light emitting deviceshown in FIG. 12. The growth substrate-removed surface 102 can be formedon one side, two sides (not shown), three sides or the four sides of thesemiconductor light emitting device, or can simply be an opening form.To avoid redundancy in explaining, like or similar elements designatedby the same reference numerals will not be explained. The electricalconnection 93 may be positioned in the growth substrate-removed surface102, or on the interface separating a chip from another.

FIG. 17 is a view illustrating examples of the form of an electricalconnection according to the present disclosure, in which (a) shows thattwo electrical connections 93 are formed, and (b) and (d) show that afinger electrode 93 a is provided to the electrical connection 93. Thisconfiguration is applied to the semiconductor light emitting deviceshown in FIG. 14. In (c), an electric contact 81 is provided by removingan insulating layer 111 to expose a bonded layer 90. By employing theelectric contact 81 and the electrical connection 93, probing andsorting can be facilitated during the manufacturing process of a device.

FIG. 18 through FIG. 20 are views illustrating examples of theapplication of a phosphor in the present disclosure. An encapsulant 1containing phosphors can directly be applied as shown in FIG. 18; or anencapsulant 2 free of phosphors can be used, with the encapsulant 1being provided only to the upper part of a semiconductor light emittingdevice, as shown in FIG. 19; or the encapsulant 2 free of phosphors canbe used, with the encapsulant 1 being applied at a certain distance awayfrom the semiconductor light emitting device, as shown in FIG. 20.

Herein below, there will be explained a variety of embodiments of thepresent disclosures.

(1) A semiconductor light emitting device, comprising: a plurality ofsemiconductor layers that grows sequentially on a growth substrate, withthe plurality of semiconductor layers including a first semiconductorlayer having a first conductivity and a growth substrate-removed surfaceformed on the side thereof, a second semiconductor layer having a secondconductivity different from the first conductivity, and an active layerinterposed between the first semiconductor layer and the secondsemiconductor layer, generating light via electron-hole recombination; asupporting substrate having a first surface and a second surfaceopposite to the first surface, wherein a first electrical pass via whicheither electrons or holes are transferred to the plurality ofsemiconductor layers, and a second electrical pass via which eitherelectrons or holes whichever have not been transferred via the firstelectrical pass are transferred to the plurality of semiconductor layerscontinue from the second surface to the first surface; a bonded layer,which bonds the second semiconductor layer side of the plurality ofsemiconductor layers to the first surface side of the supportingsubstrate and is electrically connected with the first electrical pass;a bonded layer-removed surface formed on the first surface, exposing thesecond electrical pass and being open towards the plurality ofsemiconductor layer; and an electrical connection for electricallyconnecting the plurality of semiconductor layers with the secondelectrical pass exposed on the bonded layer-removed surface such thateither electrons or holes whichever have not been transferred via thefirst electrical pass are transferred to the plurality of semiconductorlayers. Here, the bonded layer means a layer formed after bonding, notany layer to be bonded before bonding which is formed either of theplurality of semiconductors or the supporting substrate.

(2) A semiconductor light emitting device, wherein the first electricalpass is electrically connected to the first semiconductor layer via thebonded layer, and the second electrical pass is electrically connectedto the second semiconductor layer via the electrical connection.

(3) A semiconductor light emitting device, further comprising: a firstconductive layer which is exposed upon the removal of the plurality ofsemiconductor layers for connection with the electrical connection, andis electrically connected to the second semiconductor layer. Here, thefirst conductive layer can be only metal(s) (for examples: Ag, Ni,Ag/Ni) or metal(s) with any metal oxide(s) (for examples: ITO). Itusually a reflection function and can be used in combination with anon-conductive structure such as ODR and/or DBR.

(4) A semiconductor light emitting device, wherein the first electricalpass is electrically connected to the second semiconductor layer via thebonded layer, and the second electrical pass is electrically connectedto the first semiconductor layer via the electrical connection.

(5) A semiconductor light emitting device, further comprising: a secondconductive layer which is exposed upon the removal of the plurality ofsemiconductor layers for connection with the electrical connection, andis electrically connected to the first semiconductor layer. Here, thesecond conductive layer functions to supply electricity to the firstsemiconductor layer and can be used as a part of the bonded layer.

(6) A semiconductor light emitting device, wherein the plurality ofsemiconductor layers are all covered by the bonded layer, when projectedin a direction from the plurality of semiconductor layers to thesupporting substrate.

(7) A semiconductor light emitting device, further comprising: anelectric contact which is exposed on the opposite side of the supportingsubstrate with respect to the bonded layer, and interworks with theelectrical connection for use in probing of the semiconductor lightemitting device.

(8) A method for manufacturing a semiconductor light emitting device,comprising the steps of: preparing a plurality of semiconductor layersthat grows sequentially on a growth substrate, with the plurality ofsemiconductor layers including a first semiconductor layer having afirst conductivity and a growth substrate-removed surface being formedon the side thereof, a second semiconductor layer having a secondconductivity different from the first conductivity, and an active layerinterposed between the first semiconductor layer and the secondsemiconductor layer, generating light via electron-hole recombination;preparing a supporting substrate having a first surface and a secondsurface opposite to the first surface, wherein a first electrical passvia which either electrons or holes are transferred to the plurality ofsemiconductor layers, and a second electrical pass via which eitherelectrons or holes whichever have not been transferred via the firstelectrical pass are transferred to the plurality of semiconductor layersare provided; bonding the plurality of semiconductor layers side on theopposite side of the growth substrate with the first surface side of thesupporting substrate, such that a bonded layer is formed on the bondedregion and the first electrical pass is electrically connected to theplurality of semiconductor layers via the bonded layer; removing thesubstrate; removing the bonded layer so as to expose the secondelectrical pass; and electrically connecting the second electrical passwith the plurality of semiconductor layer such that either electrons orholes whichever have not been transferred via the first electrical passare transferred to the plurality of semiconductor layers.

(9) A method for manufacturing a semiconductor light emitting device,wherein the bonded layer removing step includes removing the pluralityof semiconductor layers.

(10) A method for manufacturing a semiconductor light emitting device,wherein the step of removing the bonded layer includes isolating theplurality of semiconductor layers for producing individual chips, andremoving the bonded layer to expose the second electrical pass.

(11) A method for manufacturing a semiconductor light emitting device,wherein the plurality of semiconductor layers has a conductive layerelectrically connected to one of the first and second semiconductorlayers, and the method further comprises, prior to the electricalconnecting step, the step of removing the plurality of semiconductorlayers to expose the conductive layer.

(12) A method for manufacturing a semiconductor light emitting device,wherein the conductive layer is electrically connected to the secondsemiconductor layer.

(13) A method for manufacturing a semiconductor light emitting device,wherein the conductive layer is electrically connected to the firstsemiconductor layer.

(14) A method for manufacturing a semiconductor light emitting device,wherein in the electrical connecting step, the second electrical passcontinues to the plurality of semiconductor layers having the growthsubstrate been removed therefrom.

(15) A method for manufacturing a semiconductor light emitting device,wherein prior to the bonding step, a part of the plurality ofsemiconductor layers is removed.

(16) A method for manufacturing a semiconductor light emitting device,wherein in the bonding step, both the first electrical pass and thesecond electrical pass are bonded to the bonded layer.

(17) A method for manufacturing a semiconductor light emitting device,wherein in the bonding step, the bonded layer is formed all over thefirst surface of the supporting substrate.

A semiconductor light emitting device and a method for manufacturing thesame according to the present disclosure make it possible to obtain aTFFC (Thin Film Flip Chip)-type semiconductor light emitting device.

Another semiconductor light emitting device and a method formanufacturing the same according to the present disclosure make itpossible to obtain a TFFC-type semiconductor light emitting device atthe wafer level.

Yet another semiconductor light emitting device and a method formanufacturing the same according to the present disclosure make itpossible to accomplish a higher productivity without suffering fromcracking of many semiconductor layers during the removal process of agrowth substrate as well as in the processes after the removal.

Yet another semiconductor light emitting device and a method formanufacturing the same according to the present disclosure make itpossible to accomplish a wafer-level TFFC-type semiconductor lightemitting device featuring an easier alignment of electrodes.

1. A semiconductor light emitting device, comprising: a plurality ofsemiconductor layers that grows sequentially on a growth substrate, withthe plurality of semiconductor layers including a first semiconductorlayer having a first conductivity and a growth substrate-removed surfaceformed on the side thereof, a second semiconductor layer having a secondconductivity different from the first conductivity, and an active layerinterposed between the first semiconductor layer and the secondsemiconductor layer, generating light via electron-hole recombination; asupporting substrate having a first surface and a second surfaceopposite to the first surface, wherein a first electrical pass via whicheither electrons or holes are transferred to the plurality ofsemiconductor layers, and a second electrical pass via which eitherelectrons or holes whichever have not been transferred via the firstelectrical pass are transferred to the plurality of semiconductor layerscontinue from the second surface to the first surface; a bonded layer,which bonds the second semiconductor layer side of the plurality ofsemiconductor layers to the first surface side of the supportingsubstrate and is electrically connected with the first electrical pass;a bonded layer-removed surface formed on the first surface, exposing thesecond electrical pass and being open towards the plurality ofsemiconductor layer; and an electrical connection for electricallyconnecting the plurality of semiconductor layers with the secondelectrical pass exposed on the bonded layer-removed surface such thateither electrons or holes whichever have not been transferred via thefirst electrical pass are transferred to the plurality of semiconductorlayers.
 2. The semiconductor light emitting device as claimed in claim1, wherein the first semiconductor layer, the active layer and thesecond semiconductor layer are Group III-nitride semiconductor lightemitting devices.
 3. The semiconductor light emitting device as claimedin claim 1, wherein the first electrical pass is electrically connectedto the first semiconductor layer via the bonded layer, and the secondelectrical pass is electrically connected to the second semiconductorlayer via the electrical connection.
 4. The semiconductor light emittingdevice as claimed in claim 3, further comprising: a first conductivelayer which is exposed upon the removal of the plurality ofsemiconductor layers for connection with the electrical connection, andis electrically connected to the second semiconductor layer.
 5. Thesemiconductor light emitting device as claimed in claim 1, wherein thefirst electrical pass is electrically connected to the secondsemiconductor layer via the bonded layer, and the second electrical passis electrically connected to the first semiconductor layer via theelectrical connection.
 6. The semiconductor light emitting device asclaimed in claim 5, further comprising: a second conductive layer whichis exposed upon the removal of the plurality of semiconductor layers forconnection with the electrical connection, and is electrically connectedto the first semiconductor layer.
 7. The semiconductor light emittingdevice as claimed in claim 5, wherein the electrical connection isextended to the growth substrate-removed surface.
 8. The semiconductorlight emitting device as claimed in claim 1, wherein the plurality ofsemiconductor layers has a mesa surface formed upon the sequentialremoval of the second semiconductor layer and the active layer. 9.(canceled)
 10. The semiconductor light emitting device as claimed inclaim 1, wherein the plurality of semiconductor layers are all coveredby the bonded layer, when projected in a direction from the plurality ofsemiconductor layers to the supporting substrate.
 11. The semiconductorlight emitting device as claimed in claim 1, further comprising: anelectric contact which is exposed on the opposite side of the supportingsubstrate with respect to the bonded layer, and interworks with theelectrical connection for use in probing of the semiconductor lightemitting device.
 12. A method for manufacturing a semiconductor lightemitting device, comprising the steps of: preparing a plurality ofsemiconductor layers that grows sequentially on a growth substrate, withthe plurality of semiconductor layers including a first semiconductorlayer having a first conductivity and a growth substrate-removed surfacebeing formed on the side thereof, a second semiconductor layer having asecond conductivity different from the first conductivity, and an activelayer interposed between the first semiconductor layer and the secondsemiconductor layer, generating light via electron-hole recombination;preparing a supporting substrate having a first surface and a secondsurface opposite to the first surface, wherein a first electrical passvia which either electrons or holes are transferred to the plurality ofsemiconductor layers, and a second electrical pass via which eitherelectrons or holes whichever have not been transferred via the firstelectrical pass are transferred to the plurality of semiconductor layersare provided; bonding the plurality of semiconductor layers side on theopposite side of the growth substrate with the first surface side of thesupporting substrate, such that a bonded layer is formed on the bondedregion and the first electrical pass is electrically connected to theplurality of semiconductor layers via the bonded layer; removing thesubstrate; removing the bonded layer so as to expose the secondelectrical pass; and electrically connecting the second electrical passwith the plurality of semiconductor layer such that either electrons orholes whichever have not been transferred via the first electrical passare transferred to the plurality of semiconductor layers.
 13. The methodfor manufacturing a semiconductor light emitting device as claimed inclaim 12, wherein the bonded layer removing step includes removing theplurality of semiconductor layers.
 14. The method for manufacturing asemiconductor light emitting device as claimed in claim 12, wherein thestep of removing the bonded layer includes isolating the plurality ofsemiconductor layers for producing individual chips, and removing thebonded layer to expose the second electrical pass.
 15. The method formanufacturing a semiconductor light emitting device as claimed in claim12, wherein the plurality of semiconductor layers has a conductive layerelectrically connected to one of the first and second semiconductorlayers, and the method further comprises, prior to the electricalconnecting step, the step of removing the plurality of semiconductorlayers to expose the conductive layer.
 16. The method for manufacturinga semiconductor light emitting device as claimed in claim 15, whereinthe conductive layer is electrically connected to the secondsemiconductor layer.
 17. The method for manufacturing a semiconductorlight emitting device as claimed in claim 15, wherein the conductivelayer is electrically connected to the first semiconductor layer. 18.The method for manufacturing a semiconductor light emitting device asclaimed in claim 12, wherein in the electrical connecting step, thesecond electrical pass continues to the plurality of semiconductorlayers having the growth substrate been removed therefrom.
 19. Themethod for manufacturing a semiconductor light emitting device asclaimed in claim 12, wherein prior to the bonding step, a part of theplurality of semiconductor layers is removed.
 20. (canceled)
 21. Themethod for manufacturing a semiconductor light emitting device asclaimed in claim 12, wherein in the bonding step, both the firstelectrical pass and the second electrical pass are bonded to the bondedlayer.
 22. The method for manufacturing a semiconductor light emittingdevice as claimed in claim 12, wherein in the bonding step, the bondedlayer is formed all over the first surface of the supporting substrate.